1. Field of the Invention
The present invention relates to a multilayer ceramic electronic component, and more particularly to an external electrode of the multilayer ceramic electronic component.
2. Description of the Related Art
A multilayer ceramic capacitor, which is a known multilayer ceramic electronic component, includes a laminate including a stack of a plurality of dielectric ceramic layers and a plurality of internal electrodes extending along interfaces between the dielectric ceramic layers, and a plurality of external electrodes each electrically connecting the internal electrodes exposed at a surface of the laminate. Such a known multilayer ceramic capacitor is shown in FIG. 4.
According to FIG. 4, the external electrodes are respectively formed on the surfaces of the laminate 102 at which the internal electrodes 104 and 105 are exposed, and thus are electrically connecting the internal electrodes 104 or 105. In order to form the external electrodes, in general, a metal paste including a metal component and a glass component is applied on the surfaces at which the internal electrodes are exposed. Subsequently, the coatings are fired, thereby forming paste electrode layers 106 and 107.
Then, Ni-based first plating layers 108 and 109 are formed over the surfaces of the paste electrode layers 106 and 107, respectively, and then Sn-based second plating layers 110 and 111 are formed over the surfaces of the respective first plating layers 108 and 109. Thus, the external electrode has a three-layer structure including the paste electrode layer, the first plating layer, and the second plating layer.
The external electrode is required to have high solder wettability when the multilayer ceramic capacitor is mounted on a substrate with a solder. In addition, the external electrode is arranged to electrically connect the electrically isolated internal electrodes to each other. The Sn-based second plating layers 110 and 111 have sufficient solder wettability, and the paste electrode layers 106 and 107 electrically connect the internal electrodes. The first plating layers 108 and 109 functions as the respective underlayers of the second plating layers 110 and 111 to prevent corrosion by the solder used for mounting.
Unfortunately, the paste electrode layers 106 and 107 have a relatively large thickness in the range of several tens of nanometers to several hundred of nanometers. In order for the dimensions of the multilayer ceramic capacitor to satisfy certain specifications, the effective volume of the paste electrode layer must be reduced to ensure a sufficient capacitance while the volume of the paste electrode layer is maintained. On the other hand, the plating layers 110 and 111 have a thickness as small as several micrometers. If the external electrode can be defined by only the first plating layer and the second plating layer, a greater effective volume can be provided.
For example, Japanese Unexamined Patent Application Publication No. 63-169014 discloses a technique of depositing an electroconductive metal layer by electroless plating over substantially the entire side surfaces of a laminate at which internal electrodes are exposed, thereby short-circuiting the internal electrode layers at the internal electrode-exposed side surfaces.
In general, a plating layer formed by plating has a specific film stress, that is, a compressive stress or a tensile stress. To produce a multilayer ceramic electronic component including at least a plating layer, as disclosed in Japanese Unexamined Patent Application Publication No. 63-169014, the effect of the film stress of the plating layer should be taken into account.
For example, Japanese Unexamined Patent Application Publication No. 2002-170733 discloses a ceramic electronic component including a ceramic electronic component body, paste-type external electrodes provided on surfaces of the body, and a Ni plating layer provided on each external electrode. Japanese Unexamined Patent Application Publication No. 2002-170733 describes that when the film stress of the Ni plating layer is 50 kgf/mm2 or less (i.e., 490 MPa or less), the ceramic component is not likely to crack even if a thermal stress or mechanical stress is applied.
It has however been discovered that when a plating layer is directly formed on the surface of the ceramic stack at which the internal electrodes are exposed, without disposing a paste electrode layer between the surface of the ceramic stack and the plating layer, as disclosed in Japanese Unexamined Patent Application Publication No. 63-169014, the film stress of the plating layer as disclosed in Japanese Unexamined Patent Application Publication No. 2002-170733, that is, 490 MPa, is not sufficient and may result in problems.
More specifically, when the film stress of the plating layer is compressive, that is, when the plating layer tends to extend in the horizontal direction, many swellings disadvantageously occur at the surface of the plating layer. This is likely due to the fact that the plating layer is formed on a significantly uneven surface at which ceramic and the internal electrodes are present together, and consequently, the compressive stress is difficult to reduce.
When the film stress of the plating layer is tensile, that is, when the plating layer tends to shrink in the horizontal direction, the adhesion to the ceramic stack of the end of the plating layer may be reduced to cause a connection failure with the internal electrodes. This is likely due to the fact that the plating layer is formed on a significantly uneven surface at which ceramic and the internal electrodes are present together, and consequently, the adhesion of the plating layer is reduced.